Three-dimensional modules for electronic integration

ABSTRACT

An electronic module ( 20, 39, 60, 80, 132, 140, 144 ) includes a substrate ( 21 ), which includes a dielectric material having a cavity ( 40, 42, 134, 142 ) formed therein. First conductive contacts ( 44 ) within the cavity are configured for contact with at least one first electronic component ( 32 ) that is mounted in the cavity. Second conductive contacts ( 44 ) on a surface of the substrate that surrounds the cavity are configured for contact with at least a second electronic component ( 28, 30 ) that is mounted over the cavity. Conductive traces ( 36, 48 ) within the substrate are in electrical communication with the first and second conductive contacts.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of U.S. Provisional PatentApplication 61/648,098, filed May 17, 2012; U.S. Provisional PatentApplication 61/654,888, filed Jun. 3, 2012; and U.S. Provisional PatentApplication 61/670,616, filed Jul. 12, 2012. All of these provisionalpatent applications are incorporated herein by reference.

FIELD OF THE INVENTION

The present invention relates generally to electronic circuits andsystems, and particularly to assembly of integrated circuits and othercomponents in such circuits and systems.

BACKGROUND

Modern electronic devices contain ever larger numbers of components andincreasing degrees of complexity. At the same time, designers arerequired to fit these components into ever smaller end-products.

These conflicting demands have led to the development ofhighly-integrated approaches to chip design and packaging. For example,multi-chip modules (MCMs) typically contain multiple integrated circuits(ICs) or semiconductor dies, and possibly discrete components, as well,on a unifying substrate. The MCM can then be assembled as a singlecomponent onto a printed circuit board. Some advanced MCMs use a“chip-stack” package, in which semiconductor dies are stacked in avertical configuration, thus reducing the size of the MCM footprint (atthe expense of increased height). Some designs of this sort are alsoreferred to as a “system in package.”

As an example of this sort of design, U.S. Pat. No. 5,905,635 describesan assembly of electronic modules with a support structure. Eachelectronic module is in the form of electronic components stacked on atleast two levels, which are separated by an intermediate layer. Eachelectronic module comprises at least one hole formed in the intermediatelayer, while the support structure comprises at least one rod elementthat is introduced into respective holes of successive modules.

Although IC chips are usually mounted on the surface of an MCM orprinted circuit substrate, in some designs an IC may be mounted in arecess in the substrate. For example, U.S. Pat. No. 7,116,557 describesan imbedded component integrated circuit assembly, in which ICcomponents are imbedded within a laminate substrate disposed on athermally conductive core, which provides a thermal sink. The circuitcomponents are electrically connected to the IC via flexible electricalinterconnects, such as flexible wire bonds. An electrically-insulatingcoating is deposited upon the flexible electrical interconnects and uponthe exposed surfaces of the integrated circuit assembly. Athermally-conductive encapsulating material encases the circuitcomponents and the flexible electrical interconnects within a rigid orsemi-rigid matrix.

SUMMARY

Embodiments of the present invention that are described hereinbelowprovide a novel three-dimensional (3D) design approach for electronicintegration.

There is therefore provided, in accordance with an embodiment of thepresent invention, an electronic module, which includes a substrateincluding a dielectric material having a cavity formed therein. Firstconductive contacts within the cavity are configured for contact with atleast one first electronic component that is mounted in the cavity.Second conductive contacts on a surface of the substrate that surroundsthe cavity are configured for contact with at least a second electroniccomponent that is mounted over the cavity. Conductive traces within thesubstrate are in electrical communication with the first and secondconductive contacts.

In a disclosed embodiment, the conductive contacts include first contactpads on the substrate, which are configured to physically andelectrically contact second contact pads on a lower surface of theelectronic components. Typically, the second electronic component isselected from a group of components consisting of integrated circuitchips and interposers, while the at least one first electronic componentis selected from a further group of components consisting of furtherintegrated circuit chips and discrete components.

In some embodiments, the conductive traces include vias, which passthrough the substrate in a direction perpendicular to the surface of thesubstrate that surrounds the cavity. The vias may be laid out on apredefined grid or disposed at a set of predefined angles relative toeach of the contacts. Typically, at least one of the vias is configuredto connect one of the first conductive contacts with one of the secondconductive contacts. Additionally or alternatively, the module includesa plurality of contact pads on an exterior surface of the substrate forcontacting a printed circuit board, wherein at least one of the vias isconfigured to connect one of the conductive contacts with one of thecontact pads on the exterior surface.

In some embodiments, the conductive traces include conductive lines,which are disposed in one or more planes parallel to the surface of thesubstrate that surrounds the cavity. The conductive lines may have anon-uniform thickness. The module may include a plurality of contactpads on a side of the substrate, which is perpendicular to the surfaceof the substrate that surrounds the cavity, wherein at least one of theconductive lines is configured to connect one of the conductive contactswith one of the contact pads on the side of the substrate. Additionallyor alternatively, the conductive lines may include at least first lines,which are disposed in a first plane defined by an inner surface of thecavity, and second lines, which are disposed in a second plane, whichcontains the surface of the substrate that surrounds the cavity.

In disclosed embodiments, the module includes one or more discreteelectronic components embedded in or on an outer surface of thesubstrate. The discrete electronic components or entire module may beconfigured and trimmed so as to meet a predefined operationalspecification. Typically, the components that are embedded in or on theouter surface of the substrate are selected from a group of componentsconsisting of resistors, flat capacitors, interdigital capacitors, andinductors.

In some embodiments, the cavity within which the first conductivecontacts are disposed is an inner cavity, and the surface of thesubstrate that surrounds the inner cavity, on which the secondconductive contacts are disposed, is an inner surface, while thesubstrate has an outer cavity that is configured to contain the at leastone second electronic component and is surrounded by an outer surface ofthe substrate, on which third conductive contacts are disposed,configured for contact with at least a third electronic component thatis mounted over the outer cavity.

In alternative embodiments, the cavity is formed in a first side of thesubstrate, and the substrate is configured for mounting of one or morethird electronic components on a second side of the substrate, oppositethe first side. In one such embodiment, the cavity formed in the firstside of the substrate is a first cavity, and a second cavity is formedin the second side of the substrate and is configured to contain atleast one of the third electronic components, which is mounted in thesecond cavity. The second side of the substrate may be configured formounting of at least another of the third electronic components over thesecond cavity.

There is also provided, in accordance with an embodiment of the presentinvention, an electronic assembly, including at least first and secondmodules coupled together electrically and mechanically. Each of themodules includes a substrate including a dielectric material having acavity formed therein. First conductive contacts within the cavity areconfigured for contact with at least one first electronic component thatis mounted in the cavity, while second conductive contacts on a surfaceof the substrate that surrounds the cavity are configured for contactwith at least a second electronic component that is mounted over thecavity. Conductive traces within the substrate are in electricalcommunication with the first and second conductive contacts.

In a disclosed embodiment, at least the first and second modules includerespective contact pads on exterior surfaces of the modules, wherein thecontact pads are connected to the conductive traces and are coupledwithin the assembly to provide electrical communication between at leastthe first and second modules.

In some embodiments, at least the first module is stacked on the secondmodule in the assembly. The first module may be stacked so that a lowersurface of the substrate of the first module, opposite the cavity in thefirst module, covers and encloses the cavity that is formed in thesecond module. Alternatively, the first module is stacked so that thecavity in the first module faces into the cavity that is formed in thesecond module.

Further alternatively, the first module is connected to the secondmodule by contact pads on a side of the first module that isperpendicular to the surface of the substrate of the first module thatsurrounds the cavity in the first module. In this case, the first modulemay be oriented so that the cavity in the first module and the cavity inthe second module open in respective directions that are mutuallyparallel or that are mutually perpendicular.

In another embodiment, the assembly includes a dielectric base, whereinat least the first and second modules are mounted side-by-side on asurface of the dielectric base, while the cavity in the first module andthe cavity in the second module open in a direction that isperpendicular to the surface.

There is additionally provided, in accordance with an embodiment of thepresent invention, a method for producing an electronic module. Themethod includes providing a substrate including a dielectric materialhaving a cavity formed therein, having first conductive contacts withinthe cavity, second conductive contacts on a surface of the substratethat surrounds the cavity, and conductive traces within the substrate inelectrical communication with the first and second conductive contacts.At least one first electronic component is mounted within the cavity incontact with the first conductive contacts. At least a second electroniccomponent is mounted over the cavity, on the surface of the substratethat surrounds the cavity, in contact with the second conductivecontacts.

The present invention will be more fully understood from the followingdetailed description of the embodiments thereof, taken together with thedrawings in which:

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic sectional illustration of a multi-level electronicmodule, in accordance with an embodiment of the present invention;

FIG. 2 is a schematic detail view of a multi-level electronic module, inaccordance with an embodiment of the present invention;

FIGS. 3A-3C are schematic top views of successive layers of amulti-level electronic module, in accordance with an embodiment of thepresent invention;

FIG. 4 is a schematic top view of a layer of a multi-level electronicmodule, in accordance with an embodiment of the present invention;

FIG. 5 is a schematic detail view of a multi-level electronic module, inaccordance with another embodiment of the present invention;

FIGS. 6A-6C are schematic top views of successive layers of amulti-level electronic module, in accordance with an alternativeembodiment of the present invention;

FIG. 7 is a schematic top view of a layer of a multi-level electronicmodule, in accordance with yet another embodiment of the presentinvention;

FIG. 8 is a schematic sectional illustration of a multi-level electronicmodule, in accordance with a further embodiment of the presentinvention;

FIG. 9 is a schematic sectional illustration of a multi-level electronicmodule, showing laser trimming of an embedded capacitor, in accordancewith an embodiment of the present invention;

FIG. 10 is a schematic top view of a layer in a multi-level electronicmodule, showing an embedded resistor, in accordance with an embodimentof the present invention;

FIG. 11 is a schematic sectional illustration of a multi-levelelectronic module, showing an embedded flat capacitor, in accordancewith an embodiment of the present invention;

FIG. 12 is a schematic sectional illustration of a multi-levelelectronic module, showing an embedded interdigital capacitor, inaccordance with an embodiment of the present invention;

FIG. 13 is a schematic top view of a layer in a multi-level electronicmodule, showing an embedded inductor, in accordance with an embodimentof the present invention;

FIGS. 14A-C are schematic sectional illustrations of multi-levelelectronic modules, in accordance with alternative embodiments of thepresent invention;

FIG. 15 is a schematic sectional illustration of a stack of multi-levelelectronic modules, in accordance with an embodiment of the presentinvention;

FIG. 16 is a schematic side view of an assembly comprising multiplemulti-level electronic modules, in accordance with an embodiment of thepresent invention;

FIGS. 17-19 are schematic side views of assemblies comprising multiplemulti-level electronic modules, in accordance with alternativeembodiments of the present invention; and

FIG. 20 is a schematic side view of an assembly comprising multiplemulti-level electronic modules, in accordance with a further embodimentof the present invention.

DETAILED DESCRIPTION OF EMBODIMENTS Overview

Embodiments of the present invention that are described herein provide anew type of electronic module that enables multiple IC chips and othercomponents (including passive discrete components, as well asmicroelectromechanical, optical and other multifunctional parts) to bemounted together with high component density in a three-dimensional (3D)assembly. Such modules create a platform suitable for componentsmanufactured by different fabrication processes and supportincorporation of special materials into 3D designs. This module designalso optimizes heat dissipation and thus improves system powercapability, while integrated interconnections ensure a high level ofreliability. Modules in accordance with embodiments of the presentinvention are useful in optimizing system performance and reducingproduct cost and time to market.

In the disclosed embodiments, an electronic module comprises adielectric substrate having a cavity. (This sort of substrate with oneor more cavities is equivalently referred to herein as a “frame.”)Conductive contacts within the cavity permit one or more electroniccomponents, which may be discrete components or ICs, to be mounted onthe surface of the substrate within the cavity. Additional conductivecontacts on the surface of the substrate that surrounds the cavity canbe used to mount one or more additional electronic components, such asan integrated circuit or interposer, over the cavity. The cavity mayhave two or more nested layers, thus allowing components to be mountedat three or more levels. Discrete components may also be embedded in thesubstrate itself.

Conductive traces within the substrate connect to the conductivecontacts on the surface of the substrate (within and on the surfacesurrounding the cavity). The traces can be laid out as desired toprovide the appropriate connections between the components, as well asto contact pads on the outer surface of the substrate. These outercontact pads can be used to mount the module on a printed circuit board,as well as to connect multiple modules together into a larger assembly.

Embodiments of the present invention implement the following designprinciples:

-   -   Separation of parts with different functions, materials and        production processes.    -   Performance and cost optimization of each part.    -   Easy assembly of multifunctional parts on 3D dielectric frame.    -   Minimal number of reliable standard interconnections.    -   Improved heat dissipation and enhanced reliability.

The dielectric frame that is used in the disclosed embodiments has manyadvantages, including the following:

1. A wide range of dielectric materials may be used, including, forexample, both laminates and ceramics (such as low temperature co-firedceramic—LTCC).

2. Cost effective manufacturing technologies can be used to produce theframe.

3. The frame has excellent high-frequency properties for use in radiofrequency (RF) circuit applications.

4. Existing assembly techniques can be used in assembling components onthe frame.

5. The open-cavity design of the frame makes it suitable for use withmicroelectromechanical systems (MEMS) and optical components, as well aselectronic components.

6. Open cavities of different sizes, as shown in the embodimentsdescribed below, enable simultaneous mounting of chips from smallerparts on the bottom layers to larger ICs and interposers on the top,without the need for expensive chip embedding to build true 3Dmultilayer structures with high component density.

7. A ground plane may be formed on the back side of the frame.

8. After component assembly, the frame may optionally be encapsulated,using existing techniques and materials.

9. The flexible design principles enable optimization of moduleperformance by producing each component (including both discretecomponents and ICs) using the most suitable material and manufacturingtechniques. The performance of each part can thus be optimized at anearly design stage. Internal, non-inductive connections enablehigh-speed, low-loss interconnection of components.

10. The frame design supports enhanced reliability. Each part can bepre-tested. The design also allows trimming of the entire assembledmodule and thus may improve its performance. Heat dissipation can beoptimized using the proper interconnections and special materials withhigh thermal conductivity. ICs with flip-chip or chip-scale form factorscan be used for cost-effectiveness and reliability. Modules may beencapsulated, as noted above.

11. As described below, single frames may function as 3D buildingblocks. These building blocks enable fabrication and assembly of larger,more complicated, multidimensional structures with higher hierarchies.

12. The modularity of these embodiments provide many other benefits inrespect to cost, power budget, mechanical stress relief, speedenhancement, and system features such as standardization of testingprograms.

FIG. 1 is a schematic sectional illustration of a multi-level electronicmodule 20, in accordance with an embodiment of the present invention.The module is built on a dielectric substrate 21, which in this examplecomprises three layers 22, 24, 26, together defining the frame of module20. Layers 22 and 24 are open in their centers, thus containing an outercavity 40 and a nested inner cavity 42. The particular geometry ofmodule 20 is shown by way of example, and modules having alternativegeometries are shown in other figures that are described hereinbelow.For convenience, FIG. 1 shows a set of Cartesian axes, with the X- andY-directions running in the transverse directions parallel to thesurfaces of layers 22, 24 and 26 on which components are mounted, whilethe Z-direction runs perpendicular to these surfaces.

Substrate 21 may comprise any suitable electrically-insulating material.For example, LTCC (ceramic) provides excellent heat transfer and thusfacilitates cooling of the components, whereas a laminate isparticularly cost-effective in producing multilayer structures.Alternatively, an elastic polymer may be used to provide improvedabsorption of mechanical vibrations, or other suitable dielectricmaterials that are known in the art may be chosen depending on systemrequirements.

Electronic components are mounted in a 3D array in module 20. Components32 (which may typically be discrete components or ICs) are mounted onthe surface of layer 26 within cavity 42. Another component 30, such asan IC, is mounted over cavity 42, on the surface of layer 24 thatsurrounds the cavity. (Layer 24, and similarly layer 22, may surroundthe corresponding cavities 42 and 40 on all sides or only on two orthree sides.) Yet another component 28, such as an IC or interposer, ismounted over cavity 40, on the surface of layer 22. (Interposerstypically comprise simple IC chips with suitable interconnections.) TheICs and discrete components in module 20 may be contained in chip-scaleor flip-chip packages or may be assembled as bare dies. Some discretecomponents 34 can be also embedded in substrate 21, as explained furtherhereinbelow.

The electronic components mounted on and in module are connected byconductive traces running on and through substrate 21, as shown in thefigures that follow. These traces typically include vias 36, which passthrough substrate 21 in a direction perpendicular to the surfaces in andsurrounding cavities 40 and 42 on which the components are mounted(i.e., in the Z-direction), as well as conductive lines disposed in X-Yplanes that are parallel to the component mounting surface, as shown,for example in FIG. 2. The conductive traces and contacts may beproduced using standard silver printing or photochemical techniques forcopper, or they may, alternative or additionally, comprise other metals,as well as conductive polymers and adhesives.

Module 20 is configured for mounting on a larger underlying substrate,such as a printed circuit board (PCB), using contact pads 37 and/or 38on the exterior surfaces of substrate 21. Alternatively or additionally,contact pads 37 and/or 38 may be used for connecting module 20 to othermodules, as shown, for example, in FIGS. 15-20. External contact pads 37and 38 may be of any suitable type, such as ball grid array (BGA), landgrid array (LGA), or surface mounted device (SMD) contacts. As shown inFIG. 1, contacts 37 are located on the sides of substrate 21 that areperpendicular to the component-mounting surfaces in and surroundingcavities 40 and 42, while contacts 38 are on the bottom surface of thesubstrate (or the top surface—though this option is not shown in FIG.1), parallel to the component-mounting surfaces. Typically, contacts 38are connected to the electronic components in module 20 by vias 36,while contacts 37 are connected by transverse conductive lines runningparallel to the component-mounting surfaces, as shown, for example, inFIGS. 4 and 8.

FIG. 2 is a schematic detail view of a multi-level electronic module 39,in accordance with another embodiment of the present invention. Thisfigure shows details of vias 36 and transverse conductive lines 48, aswell as their connections to components 28, 30 and 32. Conductive lines48 typically run, as noted earlier, along the surfaces of layers 22, 24and 26, and are thus formed both on the inner surface of cavity 42 (onlayer 26) and on the surfaces of layers 22 and 24 surrounding cavities40 and 42. The vias and lines are typically designed for low resistanceand little or no inductance.

Vias 36 and lines 48 are connected to the components by conductivecontact pads 46 formed on the surfaces of layers 22, 24 and 26 ofsubstrate 21. Contact pads 46 make physical and electrical contact withconductive pads 44 on components 28, 30 and 32, using suitable solderingor other bonding techniques. Thus, these components may be connected theexternal contact pads (such as pad 38) of module 39, as well as to oneanother, by means of vias 36 and lines 48 extending between contact pads46, at either the same or different levels of the substrate.

Design of Conductive Vias and Lines

Via patterns can be specially designed and produced for each specificmodule, but the design process can be simplified and production costreduced by providing standard via patterns for similar packages. Forsuch standard patterns, all available vias may be produced, but onlysome of them may be connected to components by conductive lines,depending on the electrical scheme of the module.

FIGS. 3A-3C are schematic top views of successive layers 26, 24, 22 of amulti-level electronic module, such as module 20, in accordance with anembodiment of the present invention. In this embodiment, vias 50 arelaid out in a predefined grid along the X and Y directions. The numberof vias that are actually used depends on the number of components, thenumber of their termination contacts, and the electrical scheme.

In the scheme shown in FIGS. 3A-3C, components 32, 30 and 28 arearranged generally in accordance with their physical sizes (from thesmallest to largest in the bottom-to-top direction). The pattern of vias50 varies from layer to layer accordingly, with the vias marked C (C1,C2 and C3) running through all three layers 22-24-26; the vias marked Brunning through layers 24 and 26; and the vias marked A running onlythrough layer 26, between the surface on which components 32 are mountedand the lower surface, where pads 38 are located. Thus, depending on thelayout of transverse conductors 48 (not shown in these figures), the “C”vias may interconnect components on any of the layers or connect thesecomponents to external contact pads. The “B” and “A” vias are morelimited in their connectivity, but together the grid of vias availablein the pictured module can be used to provide substantially any desiredpattern of inter-component and external connections.

FIG. 4 is a schematic top view of a layer of a multi-level electronicmodule, showing transverse conductive lines 48 in accordance with anembodiment of the present invention. Lines 48 are laid out in arectilinear pattern, like vias 50 in FIGS. 3A-3C. In the example shownin FIG. 4, lines 48 connect component 32 to contact pads 37 on the sidesof the module. Alternatively, the same sorts of lines may be connectedto vias, as well as to other components in the same layer.

FIG. 5 is a schematic detail view of a multi-level electronic module 60,in accordance with another embodiment of the present invention. Thisfigure shows how transverse lines 48 and vias 62 may be used to connectcomponents 28, 30, 32 to contact pads 38 on the lower surface of layer26 of the substrate. The same sorts of lines and vias may be used in thescheme shown in FIG. 2 and in substantially any other sort ofinterconnection scenario.

FIGS. 6A-6C are schematic top views of successive layers 26, 24, 22 of amulti-level electronic module, in accordance with an alternativeembodiment of the present invention. Unlike the preceding embodiment,this design is not based on a fixed array of vias, but rather uses onlyspecific vias 66 passing through the appropriate layers at the requiredlocations, along with transverse lines 68 connecting these vias tocomponents 28, 30 and 32. This approach may use less metal and offergreater design flexibility, with the possibility of tighter packing ofcomponents in the module in some applications.

FIG. 7 is a schematic top view of a layer of a multi-level electronicmodule, in accordance with yet another embodiment of the presentinvention. In this embodiment, vias 72 are disposed at a set ofpredefined angles relative to the contacts on which a component 70 ismounted. Transverse conductive lines 74 are then formed between thecomponent contacts and the vias that are actually in use. This sort ofdesign approach may offer a useful compromise between the grid-baseddesign shown in FIGS. 3A-3C and the “free-form” design of FIGS. 6A-6C.

Regardless of the sort of layout that is chosen, drilling and metalplating are typically the most suitable techniques for producingvertical vias in laminated substrates. The drilling can be performedmechanically or by laser, followed by copper plating using methods thatare known in the art. Reliable, non-inductive contact can generally beachieved in this manner with via diameters in the range of 50-350microns (although larger and smaller vias are also possible).

For ceramic substrates, thick-film techniques are typically the mostsuitable. In this case, openings for vias are mechanically prepared ineach layer of the ceramic green tape that is used in producing thesubstrate. Screen printing of silver, palladium-silver, or other metalpaste is used to fill these openings with conductive material. Amultilayer structure made of the ceramic green tape is then pressedtogether and sintered. In order to connect components with sideterminations, thick conductive lines (traces) can be used instead of ortogether with vias.

FIG. 8 is a schematic sectional illustration of a multi-level electronicmodule 80, showing transverse conductive lines 82, 84, in accordancewith a further embodiment of the present invention. As illustrated inthis figure, in order to connect components 32 with exterior contactpads 37, thick metal traces may be used instead of or together withdrilling of vias. Traces of this sort may also be used to createhorizontal fragments connecting to vertical vias.

For laminated substrates, thick metal cladding (generally in the rangeof 150-600 microns, although larger and smaller thicknesses mayalternatively be used) is typically the most suitable technique forproducing traces 82, 84. Metal traces up to 250 mils thick in copper andup to 500 mils in aluminum can be produced using cladding techniquesthat are known in the art. Such a thickness is more than enough toproduce reliable and non-inductive traces in the thickness range definedabove. Various techniques can be used in patterning of the thick metal(for laminate frames), such as photochemical, micro-mechanical, andlaser-based techniques, as are known in the art.

Transverse conductive lines 82, 84 may be of uniform or non-uniformthickness. For example, the termination of transverse line 84 at sidecontact 37 may include a thick part 86 close to contact 37. This thickerpart may improve termination contact for traces with thickness up to 250microns. This sort of variable trace thickness may also be useful fortransverse connections of vertical vias. A minimal metal thickness maybe used elsewhere to provide reliable and non-inductive contact, easymanufacturing of multilayer structures, and cost-effective metalpatterning.

To summarize, the sequence of steps in producing a 3D module asdescribed above with a laminated substrate may include the following:

-   -   1. Preparation of individual layers (cavities included).    -   2. Metal patterning for each layer in order to give the required        pattern of lines and contact pads.    -   3. Lamination.    -   4. Drilling and plating of vertical vias.    -   5. Addition of external terminations.    -   6. Assembly of components.

For ceramic substrates, thick metal traces (connecting to side contactsor vias) can be built by multi-screen printing of conductive thick-filmpaste, which simultaneously allows patterning of the trace. In this sortof module, trace thickness in the range of 150-250 microns is typicallydesirable.

To summarize in this case, for ceramic technology, the sequence of stepsin production of a 3D module may be as follows:

-   -   1. Preparation of green ceramic tape for every layer (with        required cavities and vias)—including screen printing of lines,        vias and contact pads for every layer.    -   2. Pressing the individual layers together to form a multilayer        structure.    -   3. Sintering.    -   4. Addition of external terminations.    -   5. Assembly of components.

New 3D printing (additive manufacturing) techniques are also suitablefor frame production. In this case, the 3D frame is just printed layerby layer with the desired combination of conductive materials for pads,lines and vias, and insulating material for the rest. This manufacturingtechnique is cost-effective for thick conductive horizontal traces andvertical vias in complicated patterns.

Incorporation of Embedded Components

As illustrated schematically in FIG. 1, substrate 21 may containembedded components 34, such as resistors, capacitors and inductors.Such components may be used in substantially any type of electronicmodule, but they are particularly useful in construction of varioustypes of RF circuits and chips, such as filters, baluns andtransformers. The embedded components may be used in conjunction withother discrete components placed on the mounting surfaces of thesubstrate, such as components 32 (FIG. 1). This combination enables theconstruction of more complicated sorts of RF (and other) modules, suchas filters and multiplexers.

Additional techniques may be used to enhance and refine the propertiesof embedded components 34. For example, trimming techniques, such aslaser trimming, may be used to fine-tune the component values inproduction. Additionally or alternatively, special materials, such asferrites and ferroelectrics, may be incorporated in the components thatare embedded in or on the outer surface the substrate for improvedperformance. These options are illustrated in the figures that follow. Anumber of specific components are described below, but the principles oftrimming provided by the present embodiments can be applied tosubstantially any sort of trimmable component that can be embedded in oron the substrate in this manner.

FIG. 9 is a schematic sectional illustration of a multi-level electronicmodule, showing laser trimming of an embedded capacitor 90, inaccordance with an embodiment of the present invention. Dielectric layer26 in this embodiment is itself a multi-layer structure. Thus, capacitor90 comprises an inner conductive plate 92, formed on an inner layersurface of layer 26, and an outer conductive plate 94, formed on theupper surface of layer 26 to enable trimming. The characteristics ofcapacitor 90 are measured, and a laser 96 removes sufficient materialfrom plate 94 to reach the appropriate component values to give thedesired operating properties at the design frequency of the module. Forexample, in producing filters and multiplexers, insertion loss andrejection in specified frequency bands is measured, and electromagneticsimulation is applied (as is known in the art) to calculate the requiredtrimming values. Similar techniques may be used in modules of othertypes.

FIG. 10 is a schematic top view of a layer in a multi-level electronicmodule, showing an embedded resistor 100 in accordance with anembodiment of the present invention. Resistor 100 comprises a conductivetrace 102, which connects to a resistive pad 104. The resistance ofresistor 100 is determined by the width of pad. Thus, the resistance maybe trimmed, using the techniques described above, by cutting pad 104,for example along a line 106.

Similarly, resistors, inductors and interdigital capacitors may beformed on the outer surface of one of the layers of a module, and thentrimmed by similar techniques. For example, resistance and inductancevalues may be trimmed by narrowing the conductive lines, whilecapacitance is trimmed by removing a part of the electrodes. Thisapproach allows testing and trimming of the entire module, either beforeor after the components of the module have been assembled. Such modulescan be individually tested and trimmed in highly-standardized testprograms by automatic equipment.

Alternatively or additionally, when trimming is not required, embeddedcomponents 34 may be contained entirely within one of the dielectriclayers of the substrate, along with suitable conductive tracesconnecting to them. Circuit corrections may still be achieved, forexample, by means of discrete components 32 mounted on the frame.

Various techniques may be used to embed components 32 in a layer of amodule substrate (and in other layers within the dielectric frame of amodule, whether or not the component surfaces are to be available forsubsequent trimming). When the substrate comprises a laminate, theconductors and other elements making up the component (such asferroelectric and/or magnetic elements) may simply be embedded at theappropriate stages in the process of lamination. On the other hand,ceramic substrates generally require high-temperature sintering, whichcan damage embedded components. Therefore, when a ceramic substrate isused, holes may be left in the substrate at the sintering stage forinsertion of embedded components thereafter. After the components havebeen inserted, the holes may optionally be filled with a suitableencapsulation material.

FIG. 11 is a schematic sectional illustration of a multi-levelelectronic module, showing an embedded flat capacitor 110, in accordancewith an embodiment of the present invention. A ferroelectric material114 is embedded in substrate layer 26 between electrodes 112 of thecapacitor.

FIG. 12 is a schematic sectional illustration of a multi-levelelectronic module, showing an embedded interdigital capacitor 116, inaccordance with another embodiment of the present invention. In thiscase, a set of interleaved electrodes 120 of the capacitor may beembedded alongside or between one or more embedded ferroelectric layers118.

FIG. 13 is a schematic top view of a layer in a multi-level electronicmodule, showing an embedded inductor 124, in accordance with stillanother embodiment of the present invention. Here a ferrite 130 or othermagnetic material is embedded in layer 26 within a wire coil 126 of theinductor in order to increase inductance.

Alternative Frame Designs and Multi-Frame Modules

The frame geometry of module 20 that is shown in FIG. 1 and is repeatedin a number of the subsequent figures is representative of the sort ofstructures that may be created based on the principles of the presentinvention, but it is shown only by way of example and not limitation. Anumber of further examples are shown in the figures that follow.Alternative cavity-based, multi-level module designs will be apparent tothose skilled in the art after reading the present description and areconsidered to be within the scope of the present invention.

FIG. 14A is a schematic sectional illustration of a multi-levelelectronic module 132, in accordance with an alternative embodiment ofthe present invention. Here a cavity 134 is formed in one side of thesubstrate, and components 30 and 32 are mounted over and in the cavity,respectively. Additional traces (not shown) are provided on the otherside of the substrate of module 132, opposite cavity 134, to enablemounting of further components 136 on this opposite side, as well. Inthis embodiment, contact pads 38 are formed on the same side of thesubstrate as cavity 134 (rather than on the opposite side as in thepreceding embodiments), and thus enable module 132 to be mounted on aPCB or other underlying substrate with the cavity facing toward thesubstrate.

FIG. 14B is a schematic sectional illustration of a multi-levelelectronic module 140, in accordance with another embodiment of thepresent invention. In this case, the substrate has cavities 134 and 142formed on both sides and has contact pads 38 alongside cavity 134.Components 136 are mounted in cavity 134, while components 30 and 32 aremounted over and in cavity 142.

FIG. 14C is a schematic sectional illustration of a multi-levelelectronic module 144, in accordance with yet another embodiment of thepresent invention. This embodiment is similar to module 140, but alsoprovides mounting surfaces around the edges of both cavity 134 andcavity 142, so that components 146 and 30 may be mounted over thesecavities respectively.

Although the preceding figures all show modules comprising only a singlesubstrate frame, in the embodiments described below two or more of thesemodules may be coupled together electrically and mechanically to producea single, integrated electronic assembly. This coupling is typicallyaccomplished by joining together suitable contact pads on the exteriorsurfaces of the modules. For example, flip-chip terminations on any sideof the substrates may be used for this purpose. This approach enablesincorporation of single modules into complicated 3D structures andarrays by soldering or bonding the frames to each other. It can beuseful not only for electronic circuits, but also for optical andelectro-mechanical devices, as well as some types of “system in package”products.

FIG. 15 is a schematic sectional illustration of an assembly 150 of thissort, in accordance with an embodiment of the present invention.Assembly 150 comprises a stack of multi-level electronic modules, 152,154, 156. These modules typically contain internal conductive contactsand traces similar to those shown in the preceding figures. Modules 152,154 and 156 are connected to one another by contact pads 158 on theirrespective upper and/or lower surfaces, which connect to the traceswithin each module and thus provide electrical communication between themodules.

Modules 152, 154 and 156 contain respective cavities 160, 162 and 164.The modules are stacked in this embodiment so that the lower surface ofthe substrate in module 152 (opposite cavity 160) covers and enclosescavity 162 in module 154, while the lower surface of the substrate inmodule 154 covers and encloses cavity 164 in module 156.

FIG. 16 is a schematic side view of an assembly 170 comprising multiplemulti-level electronic modules 174, in accordance with anotherembodiment of the present invention. In this embodiment, each module 174contains a respective cavity 176 and has contact pads 178 on a side ofthe module that is perpendicular to the surface of the module substratethat surrounds the cavity. Modules 174 are thus mounted side-by-side onthe upper surface of a dielectric base 172, with their cavities 176opening in a direction perpendicular to the surface. Base 172 may itselfbe mounted on a PCB or other substrate by means of contact pads 38. Thisconfiguration is particularly useful in creating multi-module assemblieswith high component density.

FIG. 17 is a schematic side view of an assembly 180 comprising multiplemulti-level electronic modules 182, 184, 186, in accordance with analternative embodiment of the present invention. Each of modules 182,184, 186 is attached to at least one of the other modules by contactpads 178 formed on a side of the module that is perpendicular to thesurface of the module substrate that surrounds its respective cavity.This arrangement allows modules 182 and 184 to be connected together inan orientation such that their respective cavities open inmutually-parallel directions. On the other hand, contact pads on theupper surface of module 182 enable module 186 to be mounted, as shown inthe figure, with its cavity opening in a direction perpendicular to thatof the cavities in modules 182 and 184.

This flexibility in placement of the contact pads, for mutual attachmentof the modules, allows assemblies to be created in a wide variety ofshapes and configurations.

FIG. 18, for example, is a schematic side view of an assembly 190comprising multiple multi-level electronic modules 192, 194 and 196, inaccordance with an alternative embodiment of the present invention. Inthis case, modules 196 are mounted vertically between modules 192 and194, using contact pads 178 on the sides of modules 196 and on the topand bottom of modules 192 and 194, respectively. This arrangementdefines a central cavity 198 that is enclosed by the modules.

FIG. 19 is a schematic side view of an assembly 200 comprising twomulti-level electronic modules 202 and 204, in accordance with yetanother embodiment of the present invention. In this case, modules 202and 204 are stacked so that the cavity in module 202 faces into thecorresponding cavity in module 204. Components 206 are mounted over therespective inner cavities of modules 202 and 204, while components 208are mounted within the inner cavities. The modules are joined togetherby contact pads on their respective upper surfaces. This embodiment canthus use a single module design, of the type described above, to achieveroughly twice the component density relative to the “real estate”consumed on the PCB on which the assembly is mounted.

FIG. 20 is a schematic side view of an assembly 210 comprising multiplemulti-level electronic modules 212 and 214, in accordance with a furtherembodiment of the present invention. Module 212 is of a type similar tothat shown in FIG. 14C, with upper and lower cavities. Modules 214 havea geometry similar to that of module 20 (FIG. 1), and are connected in aperpendicular configuration, to the sides of module 212, by contact pads216.

It will be appreciated that the embodiments described above are cited byway of example, and that the present invention is not limited to whathas been particularly shown and described hereinabove. Rather, the scopeof the present invention includes both combinations and subcombinationsof the various features described hereinabove, as well as variations andmodifications thereof which would occur to persons skilled in the artupon reading the foregoing description and which are not disclosed inthe prior art.

1. An electronic module, comprising: a substrate comprising a dielectricmaterial having a cavity formed therein; first conductive contactswithin the cavity, configured for contact with at least one firstelectronic component that is mounted in the cavity; second conductivecontacts on a surface of the substrate that surrounds the cavity,configured for contact with at least a second electronic component thatis mounted over the cavity; and conductive traces within the substratein electrical communication with the first and second conductivecontacts. 2-11. (canceled)
 12. The module according to claim 1, whereinthe conductive traces comprise conductive lines, which are disposed inone or more planes parallel to the surface of the substrate thatsurrounds the cavity, and comprising a plurality of contact pads on aside of the substrate, which is perpendicular to the surface of thesubstrate that surrounds the cavity, wherein at least one of theconductive lines is configured to connect one of the conductive contactswith one of the contact pads on the side of the substrate. 13.(canceled)
 14. The module according to claim 1, and comprising one ormore discrete electronic components embedded in or on an outer surfaceof the substrate.
 15. The module according to claim 14, wherein thediscrete electronic components are configured and trimmed so that thecomponents or the entire module meet a predefined operationalspecification.
 16. (canceled)
 17. The module according to claim 1,wherein the cavity within which the first conductive contacts aredisposed is an inner cavity, and wherein the surface of the substratethat surrounds the inner cavity, on which the second conductive contactsare disposed, is an inner surface, and wherein the substrate has anouter cavity that is configured to contain the at least one secondelectronic component and is surrounded by an outer surface of thesubstrate, on which third conductive contacts are disposed, configuredfor contact with at least a third electronic component that is mountedover the outer cavity.
 18. The module according to claim 1, wherein thecavity is formed in a first side of the substrate, and wherein thesubstrate is configured for mounting of one or more third electroniccomponents on a second side of the substrate, opposite the first side.19. The module according to claim 18, wherein the cavity formed in thefirst side of the substrate is a first cavity, and wherein a secondcavity is formed in the second side of the substrate and is configuredto contain at least one of the third electronic components, which ismounted in the second cavity.
 20. The module according to claim 19,wherein the second side of the substrate is configured for mounting ofat least another of the third electronic components over the secondcavity.
 21. An electronic assembly, comprising at least first and secondmodules coupled together electrically and mechanically, each of themodules comprising: a substrate comprising a dielectric material havinga cavity formed therein; first conductive contacts within the cavity,configured for contact with at least one first electronic component thatis mounted in the cavity; second conductive contacts on a surface of thesubstrate that surrounds the cavity, configured for contact with atleast a second electronic component that is mounted over the cavity; andconductive traces within the substrate in electrical communication withthe first and second conductive contacts.
 22. The assembly according toclaim 21, wherein at least the first and second modules compriserespective contact pads on exterior surfaces of the modules, wherein thecontact pads are connected to the conductive traces and are coupledwithin the assembly to provide electrical communication between at leastthe first and second modules.
 23. The assembly according to claim 21,wherein at least the first module is stacked on the second module in theassembly.
 24. The assembly according to claim 23, wherein the firstmodule is stacked so that a lower surface of the substrate of the firstmodule, opposite the cavity in the first module, covers and encloses thecavity that is formed in the second module.
 25. The assembly accordingto claim 23, wherein the first module is stacked so that the cavity inthe first module faces into the cavity that is formed in the secondmodule.
 26. The assembly according to claim 23, wherein the first moduleis connected to the second module by contact pads on a side of the firstmodule that is perpendicular to the surface of the substrate of thefirst module that surrounds the cavity in the first module.
 27. Theassembly according to claim 26, wherein the first module is oriented sothat the cavity in the first module and the cavity in the second moduleopen in respective directions that are mutually parallel.
 28. Theassembly according to claim 26, wherein the first module is oriented sothat the cavity in the first module and the cavity in the second moduleopen in respective directions that are mutually perpendicular.
 29. Theassembly according to claim 21, and comprising a dielectric base,wherein at least the first and second modules are mounted side-by-sideon a surface of the dielectric base, while the cavity in the firstmodule and the cavity in the second module open in a direction that isperpendicular to the surface.
 30. A method for producing an electronicmodule, the method comprising: providing a substrate comprising adielectric material having a cavity formed therein, having firstconductive contacts within the cavity, second conductive contacts on asurface of the substrate that surrounds the cavity, and conductivetraces within the substrate in electrical communication with the firstand second conductive contacts; mounting at least one first electroniccomponent within the cavity in contact with the first conductivecontacts; and mounting at least a second electronic component over thecavity, on the surface of the substrate that surrounds the cavity, incontact with the second conductive contacts. 31-43. (canceled)
 44. Themethod according to claim 30, wherein providing the substrate comprisesembedding one or more discrete electronic components in or on an outersurface of the substrate, and wherein embedding the one or more discreteelectronic components comprises trimming at least one of the embeddedcomponents so that the components or the entire module meet a predefinedoperational specification. 45-49. (canceled)
 50. A method for producingan electronic assembly, comprising coupling together, electrically andmechanically, at least first and second modules produced according tothe method of claim
 30. 51-58. (canceled)